基于0.18μm BiCMOS工艺的25Gbit/s光接收机前端电路设计
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摘要
采用0.18μm SiGe BiCMOS工艺,设计并实现了一款传输速率为25 Gbit/s的高速光接收机前端电路。前端电路主要包括跨阻放大器(TIA)、限幅放大器(LA)、直流偏移消除电路和输出缓冲级4部分。跨阻放大器采用了伪差分结构,相比于传统的单端转差分电路,减少了共模噪声,增强了电路的稳定性。限幅放大器采用了Cherry-Hooper结构,利用射极跟随器作为反馈通路,降低了输出电阻,将输出电容与放大级隔离,从而拓展带宽,提高电路增益。直流偏移消除电路,有效消除了跨阻放大器输出端的直流偏移,提高了电路的稳定性。仿真结果表明,光接收机前端电路跨阻增益为65.4 dBΩ,带宽为25.3 GHz,灵敏度为-16.7 dBm,功耗为163 mW。
A high-speed optical receiver front-end circuit with a transmission rate of 25 Gbit/s was designed and implemented by using 0.18 μm SiGe BiCMOS process. The front-end circuit mainly inclu-ded four parts, such as the transimpedance amplifier(TIA), limiting amplifier(LA), DC offset cancellation circuit and output buffer stage. The pseudo-differential structure was adopted in transimpedance amplifier. Compared with the traditional single-ended to differential circuits, common-mode noise was reduced and circuit stability was enhanced. The limiting amplifier employed the Cherry-Hooper structure, which used the emitter follower as a feedback path to reduce the output resistance and isolate the output capacitor from the amplifier stage, thereby expanding the bandwidth and increasing the gain of the circuit. The DC offset cancellation circuit effectively eliminated the DC offset at the output of TIA, and increased the stability of the circuit. The simulation results show that the transimpedance gain of the optical receiver front-end circuit is 65.4 dBΩ, the bandwidth is 25.3 GHz, the sensitivity is-16.7 dBm and the power consumption is 163 mW.
A high-speed optical receiver front-end circuit with a transmission rate of 25 Gbit/s was designed and implemented by using 0.18 μm SiGe BiCMOS process. The front-end circuit mainly inclu-ded four parts, such as the transimpedance amplifier(TIA), limiting amplifier(LA), DC offset cancellation circuit and output buffer stage. The pseudo-differential structure was adopted in transimpedance amplifier. Compared with the traditional single-ended to differential circuits, common-mode noise was reduced and circuit stability was enhanced. The limiting amplifier employed the Cherry-Hooper structure, which used the emitter follower as a feedback path to reduce the output resistance and isolate the output capacitor from the amplifier stage, thereby expanding the bandwidth and increasing the gain of the circuit. The DC offset cancellation circuit effectively eliminated the DC offset at the output of TIA, and increased the stability of the circuit. The simulation results show that the transimpedance gain of the optical receiver front-end circuit is 65.4 dBΩ, the bandwidth is 25.3 GHz, the sensitivity is-16.7 dBm and the power consumption is 163 mW.
引文
[1] LI D, ZHANG Z M, XIE Y, et al. A 25 Gb/s low-noise optical receiver in 0.13 μm SiGe BiCMOS[C]//Proceedings of IEEE International Conference on Electronics, Circuits and Systems. Monte Carlo, Monaco,2016:576-579.
[2] JUNG H Y, LEE J M, KIM M, et al. A monolithically integrated 25-Gb/s optical receiver based on photonic BiCMOS technology[C]// Proceedings of Conference on Lasers and Electro-Optics Pacific Rim. Singapore,2017:1-3.
[3] LóPEZ I G, RITO P, ULUSOY A C, et al. PAM-4 receiver with integrated linear TIA and 2-bit ADC in 0.13 μm SiGe∶C BiCMOS for high-speed optical communications [C]// Proceedings of IEEE MTT-S International Microwave Symposium. Honololu, HI, USA, 2017:582-585.
[4] 薛喆,何进,陈婷,等. 基于SiGe BiCMOS工艺的25 Gbit/s跨阻放大器设计[J]. 半导体技术,2017,42(12):892-895. XUE Z, HE J, CHEN T, et al. Design of 25 Gbit/s transimpedance amplifier based on SiGe BiCMOS process[J]. Semiconductor Technology, 2017,42(12): 892-895(in Chinese).
[5] RAZAVI B. Design of integrated circuits for optical communications[M]. New Jersey: John Wiley & Sons, Inc., 2012:102-103.
[6] HOLDENRIED C D, HASLETT J W, LYNCH M W. Analysis and design of HBT Cherry-Hooper amplifiers with emitter-follower feedback for optical communications[J]. IEEE Journal of Solid-State Circuits, 2004,39(11): 1959-1967.
[7] 张贵博.基于0.18 μm SiGe BiMOS工艺带有AGC功能的跨阻放大器设计[D].武汉:武汉大学,2016.
[8] KALOGERAKIS G, MORAN T, NGUYEN T, et al. A quad 25 Gb/s 270 mW TIA in 0.13 μm BiCMOS with <0.15 dB crosstalk penalty[C]// Proceedings of IEEE International Solid-State Circuits Conference Digest of Technical Papers. San Francisco, CA, USA,2013: 116-117.
[9] CHIEN Y H, FU K L, LIN S I. A 3-25 Gb/s four-channel receiver with noise-canceling TIA and power-scalable LA[J]. IEEE Transactions on Circuits and Systems: II, 2014, 61(11): 845-849.
[2] JUNG H Y, LEE J M, KIM M, et al. A monolithically integrated 25-Gb/s optical receiver based on photonic BiCMOS technology[C]// Proceedings of Conference on Lasers and Electro-Optics Pacific Rim. Singapore,2017:1-3.
[3] LóPEZ I G, RITO P, ULUSOY A C, et al. PAM-4 receiver with integrated linear TIA and 2-bit ADC in 0.13 μm SiGe∶C BiCMOS for high-speed optical communications [C]// Proceedings of IEEE MTT-S International Microwave Symposium. Honololu, HI, USA, 2017:582-585.
[4] 薛喆,何进,陈婷,等. 基于SiGe BiCMOS工艺的25 Gbit/s跨阻放大器设计[J]. 半导体技术,2017,42(12):892-895. XUE Z, HE J, CHEN T, et al. Design of 25 Gbit/s transimpedance amplifier based on SiGe BiCMOS process[J]. Semiconductor Technology, 2017,42(12): 892-895(in Chinese).
[5] RAZAVI B. Design of integrated circuits for optical communications[M]. New Jersey: John Wiley & Sons, Inc., 2012:102-103.
[6] HOLDENRIED C D, HASLETT J W, LYNCH M W. Analysis and design of HBT Cherry-Hooper amplifiers with emitter-follower feedback for optical communications[J]. IEEE Journal of Solid-State Circuits, 2004,39(11): 1959-1967.
[7] 张贵博.基于0.18 μm SiGe BiMOS工艺带有AGC功能的跨阻放大器设计[D].武汉:武汉大学,2016.
[8] KALOGERAKIS G, MORAN T, NGUYEN T, et al. A quad 25 Gb/s 270 mW TIA in 0.13 μm BiCMOS with <0.15 dB crosstalk penalty[C]// Proceedings of IEEE International Solid-State Circuits Conference Digest of Technical Papers. San Francisco, CA, USA,2013: 116-117.
[9] CHIEN Y H, FU K L, LIN S I. A 3-25 Gb/s four-channel receiver with noise-canceling TIA and power-scalable LA[J]. IEEE Transactions on Circuits and Systems: II, 2014, 61(11): 845-849.